const char DynParaLoop::NAME_OF_SPLITTED_SEQ_OUT[] = "evalSamples";
const char DynParaLoop::OLD_NAME_OF_SPLITTED_SEQ_OUT[] = "SmplPrt"; // For backward compatibility with 5.1.4
-const char DynParaLoop::NAME_OF_NUMBER_OF_BRANCHES[]="nbBranches";
-
DynParaLoop::DynParaLoop(const std::string& name, TypeCode *typeOfDataSplitted)
: ComposedNode(name),_node(0),_initNode(0),_finalizeNode(0),_nbOfEltConsumed(0),
- _nbOfBranches(NAME_OF_NUMBER_OF_BRANCHES,this,Runtime::_tc_int),
+ _nbOfBranches(this),
_splittedPort(NAME_OF_SPLITTED_SEQ_OUT,this,typeOfDataSplitted),_initializingCounter(0),_unfinishedCounter(0),_failedCounter(0),_weight(), _loopWeight(0)
{
_weight.setDefaultLoop();
std::list<InputPort *> DynParaLoop::getSetOfInputPort() const
{
list<InputPort *> ret=ComposedNode::getSetOfInputPort();
- ret.push_back((InputPort *)&_nbOfBranches);
+ ret.push_back(_nbOfBranches.getPort());
return ret;
}
InputPort *DynParaLoop::getInputPort(const std::string& name) const throw(YACS::Exception)
{
- if(name==NAME_OF_NUMBER_OF_BRANCHES)
- return (InputPort *)&_nbOfBranches;
+ if(NbBranches::IsBranchPortName(name))
+ return _nbOfBranches.getPort();
return ComposedNode::getInputPort(name);
}
std::list<InputPort *> DynParaLoop::getLocalInputPorts() const
{
list<InputPort *> ret=ComposedNode::getLocalInputPorts();
- ret.push_back((InputPort *)&_nbOfBranches);
+ ret.push_back(_nbOfBranches.getPort());
return ret;
}
bool DynParaLoop::isMultiplicitySpecified(unsigned& value) const
{
- if(_nbOfBranches.edIsManuallyInitialized())
- if(_nbOfBranches.edGetNumberOfLinks()==0)
- {
- value=_nbOfBranches.getIntValue();
- return true;
- }
- return false;
+ return _nbOfBranches.isMultiplicitySpecified(value);
}
void DynParaLoop::forceMultiplicity(unsigned value)
{
- _nbOfBranches.edRemoveAllLinksLinkedWithMe();
- _nbOfBranches.edInit((int)value);
+ _nbOfBranches.forceMultiplicity(value);
}
void DynParaLoop::buildDelegateOf(InPort * & port, OutPort *initialStart, const std::list<ComposedNode *>& pointsOfView)
#include "AnyInputPort.hxx"
#include "AnyOutputPort.hxx"
#include "OutputPort.hxx"
+#include "NbBranches.hxx"
namespace YACS
{
Node *_finalizeNode;
unsigned _nbOfEltConsumed;
std::vector<int> _execIds;
- AnyInputPort _nbOfBranches;
+ NbBranches _nbOfBranches;
AnyOutputPort _splittedPort;
std::vector<Node *> _execNodes;
std::vector<Node *> _execInitNodes;
protected:
static const char NAME_OF_SPLITTED_SEQ_OUT[];
static const char OLD_NAME_OF_SPLITTED_SEQ_OUT[];
- static const char NAME_OF_NUMBER_OF_BRANCHES[];
protected:
DynParaLoop(const std::string& name, TypeCode *typeOfDataSplitted);
virtual ~DynParaLoop();
Node *edSetFinalizeNode(Node *DISOWNnode);
virtual bool edAddDFLink(OutPort *start, InPort *end) throw(Exception);
void init(bool start=true);
- InputPort *edGetNbOfBranchesPort() { return &_nbOfBranches; }
+ InputPort *edGetNbOfBranchesPort() { return _nbOfBranches.getPort(); }
int getNumberOfInputPorts() const;
int getNumberOfOutputPorts() const;
unsigned getNumberOfEltsConsumed() const { return _nbOfEltConsumed; }
if(end->getNode() == &_splitterNode)
throw Exception("Illegal link within a foreach loop: \
the 'SmplsCollection' port cannot be linked within the scope of the loop.");
- if(end == &_nbOfBranches)
+ if(end == _nbOfBranches.getPort())
throw Exception("Illegal link within a foreach loop: \
the 'nbBranches' port cannot be linked within the scope of the loop.");
}
void NbBranches::exInit(bool start)
{
- _nbOfBranches.exInit(start);
+ _nbOfBranches.exInit(start);
}
InputPort *NbBranches::getPort() const
{
- return const_cast<AnyInputPort *>(&_nbOfBranches);
+ return const_cast<AnyInputPort *>(&_nbOfBranches);
}
bool NbBranches::isMultiplicitySpecified(unsigned& value) const
linkName += start->getName()+" to "+end->getName()+")";
// Yes, it should be possible to link back the result port to any input port of the loop.
- if(end == &_nbOfBranches || end == &_algoInitPort)
+ if(end == _nbOfBranches.getPort() || end == &_algoInitPort)
if(start != &_algoResultPort)
throw Exception(std::string("Illegal OptimizerLoop link.") + linkName);
else