Merge branch 'master' into V9_merge

[tools/eficas.git] / Tests / testelem / cata5.py

diff --git a/Tests/testelem/cata5.py b/Tests/testelem/cata5.py
index aeb209477392d040e414e383982d9260b348bde7..cb015867def1af4f42e12905e352638148dcf0ff 100644 (file)
--- a/Tests/testelem/cata5.py
+++ b/Tests/testelem/cata5.py
@@ -1,10 +1,11 @@
 # -*- coding: iso-8859-15 -*-
 from Accas import SIMP,FACT,OPER,ASSD,AsException,AsType,CO,MACRO,JDC_CATA
+import Noyau
 JdC=JDC_CATA(code="ASTER")
 
-class concept(ASSD):pass
-class concept2(ASSD):pass
-class concept3(ASSD):pass
+class concept(ASSD,Noyau.AsBase):pass
+class concept2(ASSD,Noyau.AsBase):pass
+class concept3(ASSD,Noyau.AsBase):pass
 class concept4(concept2):pass
 
 def OP_ops(self,MATR,**args):
@@ -183,3 +184,22 @@ def debut(self,PAR_LOT):
 
 DEBUT=MACRO(nom='DEBUT',op=debut,sd_prod=debut_sdprod,PAR_LOT=SIMP(typ='TXM',defaut='OUI'))
 
+class entier   (ASSD):
+   def __init__(self,valeur=None,**args):
+      ASSD.__init__(self,**args)
+      self.valeur=valeur
+
+   def __adapt__(self,validator):
+      if validator.name == "list":
+          #validateur liste,cardinalité
+          return (self,)
+      elif validator.name == "type":
+          #validateur type
+          return validator.adapt(self.valeur or 0)
+      else:
+          #validateur into et valid
+          return self
+
+   def __repr__(self):
+      return "<concept entier>"
+