First test

diff --git a/src/engine/ForEachLoop.cxx b/src/engine/ForEachLoop.cxx
index 552e78cbbb75c7f0f42a5ab2b7e16d55c3093968..f1e0eb28a609bb765243b71c47fa305f60682735 100644 (file)
--- a/src/engine/ForEachLoop.cxx
+++ b/src/engine/ForEachLoop.cxx
@@ -1219,7 +1219,7 @@ int ForEachLoopGen::getFEDeltaBetween(OutPort *start, InPort *end)
   Node *work(ns);
   while(work!=co)
     {
-      ForEachLoop *isFE(dynamic_cast<ForEachLoop *>(work));
+      ForEachLoopGen *isFE(dynamic_cast<ForEachLoopGen *>(work));
       if(isFE)
         ret++;
       work=work->getFather();

diff --git a/src/engine/Runtime.cxx b/src/engine/Runtime.cxx
index ab9b6ac3c5fae79a0a7088bc5610ba5f7098d315..4d9d3999155de64a52c84849a0184cd33c0e26cd 100644 (file)
--- a/src/engine/Runtime.cxx
+++ b/src/engine/Runtime.cxx
@@ -255,6 +255,11 @@ ForEachLoop* Runtime::createForEachLoop(const std::string& name,TypeCode *type)
   return ret;
 }
 
+ForEachLoopDyn* Runtime::createForEachLoopDyn(const std::string& name,TypeCode * type)
+{
+  return new ForEachLoopDyn(name,type);
+}
+
 OptimizerLoop* Runtime::createOptimizerLoop(const std::string& name,const std::string& algLib,const std::string& factoryName,bool algInitOnFile,
                                             const std::string& kind, Proc * procForTypes)
 {

diff --git a/src/engine/Runtime.hxx b/src/engine/Runtime.hxx
index 2792af7056313cb9168d4c7af5ab6283ff352002..8d354262e252d495f3968b6a0176ff2ad20e5204 100644 (file)
--- a/src/engine/Runtime.hxx
+++ b/src/engine/Runtime.hxx
@@ -42,6 +42,7 @@ namespace YACS
     class InPropertyPort;
     class ForLoop;
     class ForEachLoop;
+    class ForEachLoopDyn;
     class OptimizerLoop;
     class WhileLoop;
     class Switch;
@@ -89,6 +90,7 @@ namespace YACS
       virtual WhileLoop* createWhileLoop(const std::string& name);
       virtual ForLoop* createForLoop(const std::string& name);
       virtual ForEachLoop* createForEachLoop(const std::string& name,TypeCode * type);
+      virtual ForEachLoopDyn* createForEachLoopDyn(const std::string& name,TypeCode * type);
       virtual OptimizerLoop* createOptimizerLoop(const std::string& name,const std::string& algLib,
                                                  const std::string& factoryName,bool algInitOnFile,
                                                  const std::string& kind="", Proc * procForTypes = NULL);

diff --git a/src/engine_swig/pilot.i b/src/engine_swig/pilot.i
index 4d5ef483353036d58b9def0905c138171aa2514b..7f21620443c2eca3aebbc1c4ac2273bf65b26a21 100644 (file)
--- a/src/engine_swig/pilot.i
+++ b/src/engine_swig/pilot.i
@@ -177,6 +177,7 @@ REFCOUNT_TEMPLATE(CompoInstmap,YACS::ENGINE::ComponentInstance)
 %newobject *::createBloc;
 %newobject *::createForLoop;
 %newobject *::createForEachLoop;
+%newobject *::createForEachLoopDyn;
 %newobject *::createWhileLoop;
 %newobject *::createSwitch;
 %newobject *::loadCatalog;

diff --git a/src/yacsloader_swig/Test/testFEDyn.py b/src/yacsloader_swig/Test/testFEDyn.py
new file mode 100644 (file)
index 0000000..40170b4
--- /dev/null
+++ b/src/yacsloader_swig/Test/testFEDyn.py
@@ -0,0 +1,43 @@
+import pilot
+import SALOMERuntime
+import loader
+
+SALOMERuntime.RuntimeSALOME.setRuntime()
+r=SALOMERuntime.getSALOMERuntime()
+p=r.createProc("prTest1")
+td=p.createType("double","double")
+ti=p.createType("int","int")
+cont=p.createContainer("gg","HPSalome")
+ti=p.createType("int","int")
+tsi=p.createSequenceTc("seqint","seqint",ti)
+# Level0
+n0=r.createScriptNode("","n0")
+o0=n0.edAddOutputPort("o0",tsi)
+n0.setScript("o0=[ elt for elt in range(6) ]")
+p.edAddChild(n0)
+n1=r.createForEachLoopDyn("n1",ti)
+n1.setWeight(3)
+n10=r.createScriptNode("","n10")
+n10.setExecutionMode("remote")
+n10.setContainer(cont)
+n1.edAddChild(n10)
+n10.setScript("""
+import time
+time.sleep(2)
+o2=2*i1
+""")
+n10.setWeight(4.)
+i1=n10.edAddInputPort("i1",ti)
+o2=n10.edAddOutputPort("o2",ti)
+p.edAddChild(n1)
+p.edAddLink(o0,n1.edGetSeqOfSamplesPort())
+p.edAddLink(n1.edGetSamplePort(),i1)
+p.edAddCFLink(n0,n1)
+n2=r.createScriptNode("","n2")
+n2.setScript("o4=i3")
+i3=n2.edAddInputPort("i3",tsi)
+o4=n2.edAddOutputPort("o4",tsi)
+n2.setScript("o4=i3")
+p.edAddChild(n2)
+p.edAddCFLink(n1,n2)
+p.edAddLink(o2,i3)
\ No newline at end of file